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LoMaRe Technologies Ltd

Junior IC Analogue Layout Engineer

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LoMaRe Technologies Ltd
Junior IC Analogue Layout Engineer
LoMaRe Technologies Ltd London (10 km)
32 - 40 hour
Status Open
Apply now

Apply on the employer's website


What we ask

Education

No minimum education required

What we offer

Hours
32 to 40 hours per week
Employment type
permanent

Job description

Junior IC Analogue Layout Engineer 

Location: London UK

Salary: Competitive, depending on qualifications and experience

Vacancy Type: Full time, permanent

The Junior IC Analogue Layout Engineer will join a small dynamic team that aims to develop a novel memory technology. The Engineer will be working closely with the engineering team and will undertake various engineering activities within the team where the individual will have the opportunity to make a significant impact. 

Key responsibilities:

Write detailed analogue architecture specifications
Work with silicon verification, and validation teams to guide successful product implementation
Delivering Analog layout at blocks level.
Delivering floorplan activities at IP level.
Participating to the power supply strategy, signals distribution between blocks.
Running all physical verifications as DRC/LVS/DFM and parasitic extractions to achieve high quality layout deliveries.
Installing PDK from different foundries.
Generate final tape out.
Participating to design reviews, write documentation and support for integration into products.
Having a strong focus on design for quality (designs are properly verified, validated, and tested for long-term reliability and zero defect).
Job requirements:

The candidate should possess a Bachelor or Master of Science degree in Computer Science, Electrical & Electronic Engineering, Material Science, or others, with at least some directly relevant experience.
Good expertise in Analogue layouts, device physics.
Experience with layout design tools such as Cadence Virtuoso-XL
Knowledge in physical implementation in Analog blocks at IPs and/or SOC level.
Knowledge in Memory Layout Design is desired.
Knowledge in analogue simulation at transistor level
Knowledge in CAD tools and PDK installation
Ability to collaborate with experienced people having different technical profiles.
Strong understanding of statistical analysis, strong analytical and problem-solving skills 
Ability to plan, coordinate and take responsibility for effective and on-time completion of project activities 
Self-motivated and creative with a passion for achieving success and excellence 
Strong interpersonal and communication skills with infectious enthusiasm and tenacity 
Excellent organizational and team working skills
Company:

LoMaRe Technologies is a semiconductor start-up developing emerging non-volatile memory (NVM) technologies with proprietary intellectual property. Headquartered in London, UK, LoMaRe is a spin-off company from world leading institution Imperial College London. Our company’s ambition is to commercialise scientific innovation and we are looking to add experienced experts to join our team in London to develop our memory technology. Apply to become a part of a future leader in semiconductor chip technology and join a dynamic fastpaced working environment with an ambitious and success-focused team.

To Apply

If you feel you are a suitable candidate and would like to work for LoMaRe Technologies, please do not hesitate to apply
Apply now

Apply on the employer's website

Apply now

Apply on the employer's website


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