SC Cleated FPGA Engineer

Job Title: SC Cleared Senior FPGA / Embedded Systems Engineer (Xilinx Zynq UltraScale+ & Yocto)
Location: Hybrid/London/Bristol as and when required
Rate: Up to £650 per day Outside IR35
Duration: 6 months with possible extension
Must be willing and eligible to go through the SC Clearance process

Our Client is hiring for a reputed client seeking a hands-on FPGA and embedded Linux expert to help design, integrate and verify high-performance hardware and software components. If you enjoy working at the boundary of silicon and systems-optimising throughput, latency and power-this could be a fantastic next step.

What you'll be doing:

Design, implement and verify custom FPGA IP modules, DSP pipelines and high-speed communications interfaces using VHDL or Verilog/SystemVerilog in AMD/Xilinx Vivado
Lead SoC hardware/software co-design by configuring and integrating the Processing System (PS) and Programmable Logic (PL) on Zynq UltraScale+ devices, using AXI interfaces
Build, maintain and customise embedded Linux components including Linux BSPs, device trees, U-Boot and kernel images using Yocto Project / PetaLinux
Develop low-level Linux device drivers, kernel modules, and bare-metal/FreeRTOS drivers to connect application software with custom hardware IP
Carry out board bring-up, debugging and system verification using tools such as logic analysers, oscilloscopes and Vivado ILA
Contribute to system-level architecture decisions across throughput, latency, power budgets, and hardware-vs-software partitioning

What you'll bring:

Proven commercial experience designing with AMD/Xilinx Zynq UltraScale+ MPSoC architectures
Strong proficiency with Vivado Design Suite, IP Integrator and simulation workflows (e.g., ModelSim, Questa or Vivado Simulator)
Solid HDL capability across VHDL, Verilog and/or SystemVerilog
Demonstrable experience with Yocto (BitBake, recipe creation, layer management) or PetaLinux for building custom Linux distributions
Strong C/C++ skills for Linux kernel-space driver work, device tree customisation and hardware abstraction layer (HAL) development
A practical, investigative approach to debugging and verification-comfortable working through complex hardware/software issues

Additional information:

Successful candidates are likely to enjoy collaborating on architectural trade-offs and performance optimisation, with an engineering mindset that balances system requirements with real-world constraints

If you're an FPGA/embedded Linux engineer who thrives on co-design, verification and performance optimisation, we'd love to hear from you. Apply now to be considered.

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